A plasma display panel (PDP) includes a front substrate having sustain discharge electrodes composed of X electrodes and Y electrodes. A rear substrate is arranged parallel with the front substrate, the rear substrate having address electrodes crossing the sustain discharge electrodes. An upper dielectric layer buries the sustain discharge electrodes. A lower dielectric layer buries the address electrodes. A barrier rib is located between the first substrate and the second substrate. The barrier rib has discharge spaces between the front substrate and the rear substrate and has a circumferential region formed at a lower height than a height of its central region. A frit is arranged spaced along a circumference of the barrier rib to attach the rear substrate to the front substrate.