Invention Grant
- Patent Title: Phase-locked loop circuit
- Patent Title (中): 锁相环电路
-
Application No.: US11976538Application Date: 2007-10-25
-
Publication No.: US07656206B2Publication Date: 2010-02-02
- Inventor: Kazuyuki Omote
- Applicant: Kazuyuki Omote
- Applicant Address: JP Tokyo
- Assignee: Thine Electronics, Inc.
- Current Assignee: Thine Electronics, Inc.
- Current Assignee Address: JP Tokyo
- Agency: Oliff & Berridge, PLC
- Main IPC: H03L7/06
- IPC: H03L7/06

Abstract:
A voltage controlled oscillator 8 is configured to include a plurality of variable delay circuits 30 that are connected to one another so as to form a ring. Output fixing units 31 each of which fixes, when the voltage controlled oscillator 8 stops operating, the output of a corresponding one of the variable delay circuits 30 are provided. As a result, even if the voltage controlled oscillator 8 that operates by following the frequency of an input clock has changed into an operation stop state, because the output fixing units 31 fix the outputs of the variable delay circuits 30, the output of the voltage controlled oscillator 8 is prevented from being in an inconstant state. Thus, it is possible to ensure that the voltage controlled oscillator 8 oscillates properly when the voltage controlled oscillator 8 resumes or starts its operation.
Public/Granted literature
- US20080100355A1 Phase-locked loop circuit Public/Granted day:2008-05-01
Information query