Invention Grant
- Patent Title: PLL oscillation circuit
- Patent Title (中): PLL振荡电路
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Application No.: US11812520Application Date: 2007-06-19
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Publication No.: US07656208B2Publication Date: 2010-02-02
- Inventor: Hiroki Kimura , Tsukasa Kobata , Yasuo Kitayama , Naoki Onishi
- Applicant: Hiroki Kimura , Tsukasa Kobata , Yasuo Kitayama , Naoki Onishi
- Applicant Address: JP Tokyo
- Assignee: Nihon Dempa Kogyo., Ltd.
- Current Assignee: Nihon Dempa Kogyo., Ltd.
- Current Assignee Address: JP Tokyo
- Agency: Jacobson Holman PLLC
- Priority: JP2006-168626 20060619
- Main IPC: H03L7/06
- IPC: H03L7/06

Abstract:
A digitally controlled PLL oscillation circuit has a VCO, a frequency divider, a reference oscillation circuit, an A/D converter, a phase comparator, a digital filter, a D/A converter, and an analog filter. A reference signal supplied from the reference oscillation circuit is output through a narrow-band crystal filter (MCF) to the A/D converter to cancel noise, jitter and a spurious wave included in the reference signal, making it possible to prevent the phase noise characteristic and spurious characteristic of a VCO output from being degraded.
Public/Granted literature
- US20080042708A1 PLL oscillation circuit Public/Granted day:2008-02-21
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