A clock generator circuit provides an output clock without an abnormal waveform pulse which causes faulty operation in other function circuits. A phase synchronizing circuit outputs a second clock synchronized with a first clock. A selector signal generator circuit outputs a switching signal when detecting the abnormal waveform pulse in the second clock. A selector outputs the first clock instead of the second clock as the output clock based on the switching signal. A delay circuit delays the second clock input to the selector so that the selector switches the output clock from the second clock to the first clock before the abnormal waveform pulse is input to the selector.