Invention Grant
US07656601B1 Current biasing circuit to reduce MR common mode voltage jumping for MR resistance measurement 失效
电流偏置电路,用于降低MR共模电压跳变用于MR电阻测量

  • Patent Title: Current biasing circuit to reduce MR common mode voltage jumping for MR resistance measurement
  • Patent Title (中): 电流偏置电路,用于降低MR共模电压跳变用于MR电阻测量
  • Application No.: US11975568
    Application Date: 2007-10-19
  • Publication No.: US07656601B1
    Publication Date: 2010-02-02
  • Inventor: Kan Li
  • Applicant: Kan Li
  • Applicant Address: BM Hamilton
  • Assignee: Marvell International Ltd.
  • Current Assignee: Marvell International Ltd.
  • Current Assignee Address: BM Hamilton
  • Main IPC: G11B5/03
  • IPC: G11B5/03
Current biasing circuit to reduce MR common mode voltage jumping for MR resistance measurement
Abstract:
A circuit for measuring resistance of a magnetoresistive head. First and second current biasing circuits are respectively coupled to opposite sides of the head. The first biasing circuit includes a first resistance, and the second biasing circuit includes a second resistance. First and second current mirrors are respectively coupled to the first and second biasing circuits. A current leg is coupled to the current mirrors. The current mirrors drive current in the resistances so that a first voltage across the first resistance is substantially equal and opposite to a second voltage across the second resistance. The biasing circuits bias current through the head such that a voltage on the first side of the head is close to the first voltage and a voltage on the second side of the head is close to the second voltage, so that the common mode voltage of the head will be close to zero.
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