Invention Grant
US07656698B1 Non-volatile memory cell with improved programming technique with decoupling pass gates and equalize transistors
有权
具有改进的编程技术的非易失性存储单元，具有去耦合通过栅极和均衡晶体管
- Patent Title: Non-volatile memory cell with improved programming technique with decoupling pass gates and equalize transistors
- Patent Title (中): 具有改进的编程技术的非易失性存储单元，具有去耦合通过栅极和均衡晶体管
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Application No.: US11656650Application Date: 2007-01-23
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Publication No.: US07656698B1Publication Date: 2010-02-02
- Inventor: Pavel Poplevine , Annie-Li-Keow Lum , Hengyang (James) Lin , Andrew J. Franklin
- Applicant: Pavel Poplevine , Annie-Li-Keow Lum , Hengyang (James) Lin , Andrew J. Franklin
- Applicant Address: US CA Santa Clara
- Assignee: National Semiconductor Corporation
- Current Assignee: National Semiconductor Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Dergosits & Noah LLP
- Main IPC: G11C11/00
- IPC: G11C11/00
Abstract:
A 4-transistor non-volatile memory (NVM) cell includes a static random access memory (SRAM) cell structure. The NVM cell utilizes a reverse Fowler-Nordheim tunneling programming technique that, in combination with the SRAM cell structure, allows an entire array to be programmed at one cycle. Equalize transistors are utilized to obtain more uniform voltage on the floating gates after an erase operation. Utilization of decoupling pas gates during a read operation results in more charge difference on floating gates of programmed and erased cells.
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