Invention Grant
US07656741B2 Row active time control circuit and a semiconductor memory device having the same 有权
行有源时间控制电路和具有该行动时间控制电路的半导体存储器件

Row active time control circuit and a semiconductor memory device having the same
Abstract:
A row active time control circuit is described that includes a master signal generating circuit and a row active control signal generating circuit. The master signal generating circuit generates one or more row active master signals based on an active command signal, a pre-charge command signal, and one or more row active control signals. The row active control signal generating circuit generates a pulse signal that oscillates based on the one or more row active master signals. The row active control signal also generates the one or more row active control signals by dividing a frequency of the generated pulse signal.
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