Invention Grant
- Patent Title: Method and apparatus for reducing clock speed and power consumption
- Patent Title (中): 降低时钟速度和功耗的方法和设备
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Application No.: US11889741Application Date: 2007-08-16
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Publication No.: US07656907B2Publication Date: 2010-02-02
- Inventor: Michael Chang , Michael A. Sokol
- Applicant: Michael Chang , Michael A. Sokol
- Applicant Address: US CA Irvine
- Assignee: Broadcom Corporation
- Current Assignee: Broadcom Corporation
- Current Assignee Address: US CA Irvine
- Main IPC: H04L7/00
- IPC: H04L7/00 ; G06F1/12

Abstract:
A system for reducing clock speed and power consumption in a network chip is provided. The system can have a core that transmits and receives signals at a first clock speed. A receive buffer can be in communication with the core and be configured to transmit the signals to the core at the first clock speed. A transmit buffer can be in communication with the core and configured to receive signals from the core at the first clock speed. A sync can be configured to receive signals in the receive buffer at a second clock speed and to transmit the signals from the transmit buffer at the second clock speed. The sync can be in communication with the transmit buffer and the receive buffer.
Public/Granted literature
- US20070286223A1 Method and apparatus for reducing clock speed and power consumption Public/Granted day:2007-12-13
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