An equalizer may use a passive input stage to improve linearity and reduce power consumption. In addition, the equalizer may use two gain circuits, one in a high frequency amplification path and the other in an all-pass path. The relative proportion of all-pass to high frequency amplification may be adjusted using a single control signal. The equalizer may provide 20 dB of peaking at 5 GHz with good linearity, using CMOS technology.