A memory controller with a self-test function includes a test controlling unit configured to generate test data in a test mode, a data transmission unit configured to generate a data read timing signal to transmit the data read timing signal and the generated test data synchronized with the data read timing signal, and a data input/output (I/O) unit configured to feedback the transmitted test data and the transmitted data read timing signal to the data transmission unit, such that the data transmission unit receives fed-back test data and a fed-back data read timing signal. The data transmission unit reads the fed-back test data based on the fed-back data read timing signal, and the test controlling unit compares the fed-back test data with the generated test data. Therefore, the memory controller may perform a fast self-test.