Invention Grant
- Patent Title: Safe store for speculative helper threads
- Patent Title (中): 安全存储投机帮助线程
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Application No.: US10633012Application Date: 2003-08-01
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Publication No.: US07657880B2Publication Date: 2010-02-02
- Inventor: Hong Wang , Tor Aamodt , Per Hammarlund , John Shen , Xinmin Tian , Milind Girkar , Perry Wang , Steve Shih-wei Liao
- Applicant: Hong Wang , Tor Aamodt , Per Hammarlund , John Shen , Xinmin Tian , Milind Girkar , Perry Wang , Steve Shih-wei Liao
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agent David P. McAbee
- Main IPC: G06F9/26
- IPC: G06F9/26 ; G06F15/76 ; G06F9/30 ; G06F9/45

Abstract:
The latencies associated with retrieving instruction information for a main thread are decreased through the use of a simultaneous helper thread. The helper thread is permitted to execute Store instructions. Store blocker logic operates to prevent data associated with a Store instruction in a helper thread from being committed to memory. Dependence blocker logic operates to prevent data associated with a Store instruction in a speculative helper thread from being bypassed to a Load instruction in a non-speculative thread.
Public/Granted literature
- US20040154012A1 Safe store for speculative helper threads Public/Granted day:2004-08-05
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