Field effect transistors (FETS) with inverted source/drain metallic contacts, and method of fabrication same

Invention Grant

US07659160B2 Field effect transistors (FETS) with inverted source/drain metallic contacts, and method of fabrication same 有权

Title translation: 具有反相源极/漏极金属触点的场效应晶体管（FETS）及其制造方法

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Patent Title: Field effect transistors (FETS) with inverted source/drain metallic contacts, and method of fabrication same
Patent Title (中): 具有反相源极/漏极金属触点的场效应晶体管（FETS）及其制造方法
Application No.: US11923075

Application Date: 2007-10-24
Publication No.: US07659160B2

Publication Date: 2010-02-09
Inventor: Michael P. Belyansky , Dureseti Chidambarrao , Lawrence A. Clevenger , Kaushik A. Kumar , Carl Radens
Applicant: Michael P. Belyansky , Dureseti Chidambarrao , Lawrence A. Clevenger , Kaushik A. Kumar , Carl Radens
Applicant Address: US NY Armonk
Assignee: International Business Machines Corporation
Current Assignee: International Business Machines Corporation
Current Assignee Address: US NY Armonk
Agency: Scully, Scott, Murphy & Presser, P.C.
Agent Joseph P. Abate, Esq.
Main IPC: H01L21/8238
IPC: H01L21/8238

Field effect transistors (FETS) with inverted source/drain metallic contacts, and method of fabrication same

Abstract:

The present invention relates to an field effect transistor (FET) comprising an inverted source/drain metallic contact that has a lower portion located in a first, lower dielectric layer and an upper portion located in a second, upper dielectric layer. The lower portion of the inverted source/drain metallic contact has a larger cross-sectional area than the upper portion. Preferably, the lower portion of the inverted source/drain metallic contact has a cross-sectional area ranging from about 0.03 μm2 to about 3.15 μm2, and such an inverted source/drain metallic contact is spaced apart from a gate electrode of the FET by a distance ranging from about 0.001 μm to about 5 μm.

Abstract(Chinese):

本发明涉及一种场效应晶体管（FET），其包括反向的源极/漏极金属接触，其具有位于第一下部电介质层中的下部和位于第二上部电介质层中的上部。倒置的源极/漏极金属触点的下部具有比上部更大的横截面面积。优选地，反相源极/漏极金属触点的下部具有约0.03mum2至约3.15mum2的横截面积，并且这种反向的源极/漏极金属触点与FET的栅电极间隔开一个距离范围从约0.001毫米到约5毫米。

Public/Granted literature

US20080042174A1 FIELD EFFECT TRANSISTORS (FETS) WITH INVERTED SOURCE/DRAIN METALLIC CONTACTS, AND METHOD OF FABRICATING SAME Public/Granted day:2008-02-21

Information query

Espacenet

IPC分类:

H	电学
H01	基本电气元件
H01L	半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L21/00	专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/70	.由在一共用基片内或其上形成的多个固态组件或集成电路组成的器件或其部件的制造或处理；集成电路器件或其特殊部件的制造（由预制电组件组成的组装件的制造入H05K3/00，H05K13/00）
H01L21/77	..在公共衬底中或上面形成的由许多固态元件或集成电路组成的器件的制造或处理（电可编程只读存储器或其多步骤的制造方法入H01L27/115）
H01L21/78	...把衬底连续地分成多个独立的器件（改变表面物理特性或者半导体形状的切割入H01L21/304）
H01L21/82	....制造器件，例如每一个由许多元件组成的集成电路
H01L21/822	.....衬底是采用硅工艺的半导体的（H01L21/8258优先）
H01L21/8232	......场效应工艺
H01L21/8234	.......MIS工艺
H01L21/8238	........互补场效应晶体管，例如CMOS