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US07659165B2 Method of fabricating a field effect transistor 失效
制作场效应晶体管的方法

Method of fabricating a field effect transistor
Abstract:
A field effect transistor in which at least one vertically arranged semiconductor column, with a diameter in the nanometer range, is located between a source and a contact and has an annular surround of a gate contact with retention of an insulation gap. A simplified production method is disclosed and the transistor produced thus is embodied such that the semiconductor columns are embedded in a first and a second insulation layer, between which a metal layer, running to the outside as a gate contact, is arranged, the ends of which, extending upwards through the second insulation layer, are partly converted into an insulator, or removed and replaced by an insulation material.
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