A poly-silicon layer is deposited on a surface of a substrate after forming a gate insulating film in an element hole of a field insulating film 12, and thereon a silicon oxide layer is formed by a thermal oxidation process. After patterning the silicon oxide layer in accordance with a gate electrode pattern, the poly-silicon layer is patterned by dry-etching using a remaining resist layer as a mask. After removing the resist layer, a gate electrode layer 16a is formed by decreasing a width of the poly-silicon layer by isotropic etching using the silicon oxide layer 18A as a mask. N+-type source and drain regions 22 and 24 and n−-type source and drain regions 26 and 28 are formed by doping impurity ions via the gate insulating film 14 through the silicon oxide layer 18A. The silicon oxide layer 18A may be made of a layer of tungsten silicide.