Invention Grant
- Patent Title: Methods of forming stepped bumps and structures formed thereby
- Patent Title (中): 形成阶梯式凸块和由此形成的结构的方法
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Application No.: US11648498Application Date: 2006-12-29
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Publication No.: US07659192B2Publication Date: 2010-02-09
- Inventor: Andrew Yeohi , Guotao Wang , Sairam Agraharam , Sudarshan Rangaraj
- Applicant: Andrew Yeohi , Guotao Wang , Sairam Agraharam , Sudarshan Rangaraj
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agent Kathy J. Ortiz
- Main IPC: H01L21/44
- IPC: H01L21/44
Abstract:
Methods of forming a microelectronic device and associated structures are described. Those methods may comprise forming a die-side conductive interconnect on a substrate, wherein the die-side conductive interconnect comprises a columnar portion and a base portion, and wherein a diameter of the base portion is greater than a diameter of the columnar portion.
Public/Granted literature
- US20080157356A1 Methods of forming stepped bumps and structures formed thereby Public/Granted day:2008-07-03
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