A semiconductor device includes a substrate formed with a predetermined trench, a plurality of devices fixed into the trench, an etch stop layer on an entire surface of the substrate including the devices while selectively exposing the devices, an interlayer dielectric layer on the etch stop layer, in which the interlayer dielectric layer includes a predetermined via hole and a predetermined trench, and a via plug and a metal line formed on the interlayer dielectric layer while filling the via hole and the trench.