Invention Grant
- Patent Title: Stacked die semiconductor device having circuit tape
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Application No.: US11532387Application Date: 2006-09-15
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Publication No.: US07659608B2Publication Date: 2010-02-09
- Inventor: Philip Lyndon R. Cablao , Dario S. Filoteo, Jr. , Emmanuel A. Espiritu , Leo A. Merilo
- Applicant: Philip Lyndon R. Cablao , Dario S. Filoteo, Jr. , Emmanuel A. Espiritu , Leo A. Merilo
- Applicant Address: SG Singapore
- Assignee: Stats Chippac Ltd.
- Current Assignee: Stats Chippac Ltd.
- Current Assignee Address: SG Singapore
- Main IPC: H01L23/02
- IPC: H01L23/02 ; H01L23/495 ; H01L23/34 ; H01L23/48 ; H01L23/52 ; H01L29/40 ; H01L21/44 ; H01L21/48 ; H01L21/50

Abstract:
A stacked die semiconductor package includes a first integrated circuit chip, a first circuit tape coupled to the first integrated circuit chip, a second integrated circuit chip coupled to the first circuit tape, and at least one component coupled to the first circuit tape. The at least one component may include one or more passive components, one or more active components, or a combination of passive and active components. The stacked die semiconductor package can also include a second circuit tape coupled to the second integrated circuit chip and a third integrated circuit chip coupled to the second circuit tape. The stacked die semiconductor package can also include an encapsulant.
Public/Granted literature
- US20080067658A1 STACKED DIE SEMICONDUCTOR PACKAGE Public/Granted day:2008-03-20
Information query
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