Invention Grant
- Patent Title: Semiconductor device having improved wiring
- Patent Title (中): 具有改进布线的半导体器件
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Application No.: US11815084Application Date: 2006-04-07
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Publication No.: US07659623B2Publication Date: 2010-02-09
- Inventor: Yuji Watanabe , Koji Hosokawa , Hisashi Tanie
- Applicant: Yuji Watanabe , Koji Hosokawa , Hisashi Tanie
- Applicant Address: JP Tokyo
- Assignee: Elpida Memory, Inc.
- Current Assignee: Elpida Memory, Inc.
- Current Assignee Address: JP Tokyo
- Agency: Sughrue Mion, PLLC
- Priority: JP2005-113413 20050411
- International Application: PCT/JP2006/307871 WO 20060407
- International Announcement: WO2006/109857 WO 20061019
- Main IPC: H01L23/488
- IPC: H01L23/488 ; H01L23/48 ; H01L25/07 ; H01L23/12 ; H01L25/065 ; H01L25/18

Abstract:
An electronic component such as a semiconductor device is provided which is capable of preventing wiring breakage in a stress concentration region of surface layer wiring lines. In a semiconductor device provided with a support ball (5), no ordinary wiring line is formed in a region (7(A)) in the vicinity of the support ball (5) and a region (7(B)) at the end of the semiconductor chip facing the support ball (5), which are the stress concentration regions of the package substrate (2). Instead, a wiring line (6(C)) is formed away from these regions or a wide wiring line is formed in these regions.
Public/Granted literature
- US20080150115A1 Semiconductor Device Public/Granted day:2008-06-26
Information query
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