Invention Grant
- Patent Title: Semiconductor integrated circuit
- Patent Title (中): 半导体集成电路
-
Application No.: US11594063Application Date: 2006-11-08
-
Publication No.: US07659629B2Publication Date: 2010-02-09
- Inventor: Yoshitaka Kimura
- Applicant: Yoshitaka Kimura
- Applicant Address: JP Mihama-ku
- Assignee: Kawasaki Microelectronics, Inc.
- Current Assignee: Kawasaki Microelectronics, Inc.
- Current Assignee Address: JP Mihama-ku
- Agency: Oliff & Berridge, PLC
- Priority: JP2005-325508 20051110
- Main IPC: H01L23/52
- IPC: H01L23/52

Abstract:
A semiconductor integrated circuit having a multilayer wiring structure is provided which includes: a top metal wiring layer (MTOP) including a plurality of top layer power supply wirings and a next-to-top metal wiring layer (MTOP-1) directly below the top metal wiring layer MTOP including a plurality of next-to-top layer power supply wirings. Each of the top layer and the next-to-top layer power supply wirings also includes first potential wirings for supplying a first potential to the circuit elements and second potential wirings for supplying a second potential to the circuit elements. The top layer power supply wirings and the next-to-top layer power supply wirings cross each other and have a top layer insulating film disposed between them. First and second contacts are provided in the insulating film for connecting the first potential wirings and second potential wirings in the top and the next-to-top metal wiring layers with each other.
Public/Granted literature
- US20070102820A1 Semiconductor integrated circuit Public/Granted day:2007-05-10
Information query
IPC分类: