Invention Grant
- Patent Title: Solder joint flip chip interconnection having relief structure
- Patent Title (中): 具有浮雕结构的焊接倒装芯片互连
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Application No.: US11640534Application Date: 2006-12-14
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Publication No.: US07659633B2Publication Date: 2010-02-09
- Inventor: Rajendra D. Pendse , KyungOe Kim , Taewoo Kang
- Applicant: Rajendra D. Pendse , KyungOe Kim , Taewoo Kang
- Applicant Address: SG Singapore
- Assignee: STATS ChipPAC, Ltd.
- Current Assignee: STATS ChipPAC, Ltd.
- Current Assignee Address: SG Singapore
- Agent Robert D. Atkins
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/52 ; H01L29/40

Abstract:
A flip chip interconnect has a tapering interconnect structure, and the area of contact of the interconnect structure with the site on the substrate metallization is less than the area of contact of the interconnect structure with the die pad. A solder mask has an opening over the interconnect site, and the solder mask makes contact with the interconnect structure, or is in close proximity to the interconnect structure, at the margin of the opening. The flip chip interconnect is provided with an underfill. During the underfill process, the contact (or near proximity) of the solder mask with the interconnect structure interferes with flow of the underfill material toward the substrate adjacent the site, resulting in formation of a void left unfilled by the underfill, adjacent the contact of the interconnect structure with the site on the substrate metallization. The void can help provide relief from strain induced by changes in temperature of the system.
Public/Granted literature
- US20070241464A1 Solder joint flip chip interconnection having relief structure Public/Granted day:2007-10-18
Information query
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