Invention Grant
US07659743B2 Method and apparatus for testing electronic components within horizontal and vertical boundary lines of a wafer 失效
用于测试晶片的水平和垂直边界线内的电子部件的方法和装置

Method and apparatus for testing electronic components within horizontal and vertical boundary lines of a wafer
Abstract:
A method and an apparatus are provided which make it possible, when testing chips arranged on a wafer, to be able to test optionally both additional components arranged on horizontal boundary lines and on vertical boundary lines. The additional components arranged on horizontal boundary lines are tested in a first position of the wafer. For testing the additional components arranged on vertical boundary lines, the wafer is rotated about its vertical axis through 90° relative to the first position into a second position. The apparatus comprises a housing and, in the housing, at least one test probe for making contact with an electronic component, a chuck for moving the wafer and a rotatably mounted additional plate operatively connected to the chuck.
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