Invention Grant
- Patent Title: Thermal electric NOR gate
- Patent Title (中): 热电NOR门
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Application No.: US12120109Application Date: 2008-05-13
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Publication No.: US07659750B2Publication Date: 2010-02-09
- Inventor: Joseph Martin Patterson
- Applicant: Joseph Martin Patterson
- Applicant Address: US CA San Diego
- Assignee: Applied Micro Circuits Corporation
- Current Assignee: Applied Micro Circuits Corporation
- Current Assignee Address: US CA San Diego
- Agency: Law Office of Gerald Maliszewski
- Agent Gerald Maliszewski
- Main IPC: H03K19/20
- IPC: H03K19/20

Abstract:
A thermal electric (TE) binary NOR gate logic circuit is provided with a method for NOR logic gating. The method accepts a first input voltage representing an input binary logic state and generates a first thermal electric (TE) temperature in response to the first input voltage. A second input voltage is accepted representing an input binary logic state, and a second TE temperature is generated in response to the second input voltage. In response to the first and second TE temperatures, a NOR logic state output voltage is generated. More explicitly, a first control voltage is generated in response to the first TE temperature, and a second control voltage is generated in response to the second TE temperature. Then, a third TE temperature is generated in response to the first and second control voltages, which in turn generates the output voltage.
Public/Granted literature
- US20090206882A1 Thermal Electric NOR Gate Public/Granted day:2009-08-20
Information query
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