Invention Grant
- Patent Title: Glitch-free clock regeneration circuit
- Patent Title (中): 无毛刺时钟再生电路
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Application No.: US11711682Application Date: 2007-02-28
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Publication No.: US07659757B2Publication Date: 2010-02-09
- Inventor: Todd Sleigh , Steve Driediger
- Applicant: Todd Sleigh , Steve Driediger
- Applicant Address: FR Paris
- Assignee: Alcatel Lucent
- Current Assignee: Alcatel Lucent
- Current Assignee Address: FR Paris
- Agency: Kramer & Amado, P.C.
- Main IPC: H03L7/00
- IPC: H03L7/00

Abstract:
A clock regeneration circuit and method including an asynchronous clock signal input to a meta-stability filtering circuit, a synchronous clock signal input to the meta-stability filtering circuit with a frequency lower than the asynchronous clock signal, and being over-sampled and rate adapted to the asynchronous clock signal, an edge detector detecting an edge of the output of the meta-stability filtering circuit, a regenerated clock signal output therefrom, and a clock regeneration stage receiving an input that is the edge-detected output.
Public/Granted literature
- US20080204090A1 Glitch-free clock regeneration circuit Public/Granted day:2008-08-28
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