Invention Grant
- Patent Title: Phase synchronous circuit
- Patent Title (中): 相位同步电路
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Application No.: US12181431Application Date: 2008-07-29
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Publication No.: US07659759B2Publication Date: 2010-02-09
- Inventor: Hiroaki Nakaya , Yasuhiko Sasaki
- Applicant: Hiroaki Nakaya , Yasuhiko Sasaki
- Applicant Address: JP Tokyo
- Assignee: Renesas Technology Corp.
- Current Assignee: Renesas Technology Corp.
- Current Assignee Address: JP Tokyo
- Agency: Miles & Stockbridge P.C.
- Priority: JPP2004-240015 20040819
- Main IPC: H03L7/00
- IPC: H03L7/00

Abstract:
An external clock round-trips a round-trip delay block configured by a selector and a short delay array, and is made capable of corresponding to a wide frequency by generating a long delay time required for synchronization at the time of a low frequency operation. Further, when a plurality of phase comparators are disposed, in both cases where comparing phases all at once and comparing phases one after another, it is possible to complete the phase synchronization within a short time by making a delay amount variable.
Public/Granted literature
- US20080284473A1 PHASE SYNCHRONOUS CIRCUIT Public/Granted day:2008-11-20
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