Invention Grant
US07659760B2 PLL circuit and semiconductor integrated device 有权
PLL电路和半导体集成器件

  • Patent Title: PLL circuit and semiconductor integrated device
  • Patent Title (中): PLL电路和半导体集成器件
  • Application No.: US12182787
    Application Date: 2008-07-30
  • Publication No.: US07659760B2
    Publication Date: 2010-02-09
  • Inventor: Yoshiyasu Doi
  • Applicant: Yoshiyasu Doi
  • Applicant Address: JP Kawasaki
  • Assignee: Fujitsu Limited
  • Current Assignee: Fujitsu Limited
  • Current Assignee Address: JP Kawasaki
  • Agency: Arent Fox LLP
  • Main IPC: H03L7/06
  • IPC: H03L7/06
PLL circuit and semiconductor integrated device
Abstract:
A charge pump circuit comprises two MOS transistors serially connected between a power supply voltage VDD and ground, a switch SW0, four switches SW1 through SW4, four capacitors C1 through C4, and four switches SW5 through SW8. If a control voltage Vcntl is to be varied, a specific switch SW of the switches SW1 through SW4 is turned on such that a specific capacitor is charged to the power supply voltage VDD. Then, a specific switch SW of the switches SW5 through SW8 is turned on to transfer the electric charge stored in the capacitor to the capacitor of a low-pass filter and thereby the control voltage is controlled at a desired value.
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