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US07659782B2 Apparatus and method to reduce jitter in a phase locked loop 有权
降低锁相环抖动的装置和方法

Apparatus and method to reduce jitter in a phase locked loop
Abstract:
A circuit and method to reduce jitter and/or noise in a phase-locked loop (PLL). A voltage-controlled oscillator (VCO) control signal is tapped and filtered to create a low-noise, filtered VCO control signal. The filtered and unfiltered control signals are individually weighted and then combined to create a modified VCO control signal which reduces the jitter and/or the noise by reducing an effect of VCO gain on the jitter and/or the noise.
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