Invention Grant
- Patent Title: High throughput wafer stage design for optical lithography exposure apparatus
- Patent Title (中): 用于光刻曝光设备的高通量晶片台设计
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Application No.: US11544417Application Date: 2006-10-06
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Publication No.: US07659965B2Publication Date: 2010-02-09
- Inventor: Kun-Yi Liu
- Applicant: Kun-Yi Liu
- Applicant Address: US WA Camas
- Assignee: Wafertech, LLC
- Current Assignee: Wafertech, LLC
- Current Assignee Address: US WA Camas
- Agency: Duane Morris LLP
- Main IPC: G03B27/58
- IPC: G03B27/58 ; G03B27/42 ; G03B27/72 ; G03B27/32

Abstract:
An optical lithography exposure apparatus which may be a stepper or a scanner, provides a wafer chuck that retains a wafer and at least one opaque exposure shield that extends over a discrete peripheral edge portion of the wafer thereby preventing illumination from exposing the portion of the wafer beneath the exposure shield. In a positive photoresist system, the portions of the wafer blocked from exposure by the shields, include alignment marks and the unexposed photoresist remains over the alignment marks thereby protecting the alignment marks from destruction or damage during subsequent patterning operations used to form patterns in the film being patterned.
Public/Granted literature
- US20080084550A1 High throughput wafer stage design for optical lithography exposure apparatus Public/Granted day:2008-04-10
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