Invention Grant
- Patent Title: Integrated circuit interface with locking signal
- Patent Title (中): 具有锁定信号的集成电路接口
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Application No.: US11753286Application Date: 2007-05-24
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Publication No.: US07660061B2Publication Date: 2010-02-09
- Inventor: Alan Lloyd
- Applicant: Alan Lloyd
- Applicant Address: GB Marlow
- Assignee: STMicroelectronics (Research & Development) Limited
- Current Assignee: STMicroelectronics (Research & Development) Limited
- Current Assignee Address: GB Marlow
- Agency: Hogan & Hartson LLP
- Priority: EP06252736 20060825
- Main IPC: G11B5/09
- IPC: G11B5/09

Abstract:
An integrated circuit for recovering a position and clock period from an input bi-phase encoded digital signal, such as an SPDIF signal, has a longest interval detector arranged to count the intervals between phase changes of the input digital signal to derive the longest interval between the phase changes. The longest interval indicates the position and period length of a preamble portion of sub-frames of the signal. A store arranged to store the longest interval between phase changes and an output provides a signal indicating the position of the longest interval between phase changes and an indication of the clock period of the input digital signal. The longest interval detector includes a pair of counters for even and odd phase transitions and counts in multiple intervals such that a clock period of 2 UI can be recovered directly from the longest pulse of 6 UI present in the preamble X of an SPDIF signal.
Public/Granted literature
- US20070274424A1 INTEGRATED CIRCUIT INTERFACE WITH LOCKING SIGNAL Public/Granted day:2007-11-29
Information query
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