Invention Grant
- Patent Title: Voltage rise suppression circuit and panel television
- Patent Title (中): 升压抑制电路和平板电视
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Application No.: US11787914Application Date: 2007-04-18
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Publication No.: US07660089B2Publication Date: 2010-02-09
- Inventor: Keigo Shibata
- Applicant: Keigo Shibata
- Applicant Address: JP Dalto-shi, Osaka
- Assignee: Funai Electric Co., Ltd.
- Current Assignee: Funai Electric Co., Ltd.
- Current Assignee Address: JP Dalto-shi, Osaka
- Agency: Yokoi & Co., U.S. A., Inc.
- Agent Peter Ganjian
- Priority: JP2006-002951 20060419
- Main IPC: H02H3/20
- IPC: H02H3/20 ; H02H3/24

Abstract:
Included are a Zener diode D2 having a cathode connected onto a voltage output line, dividing resistors having one terminal connected to the anode of the Zener diode D2 and having the other terminal grounded, a transistor Q1 having a base connected to the junction point between the dividing resistors via a resistor and having an emitter grounded, a transistor Q2 having a base connected to the junction point between the dividing resistors and having an emitter grounded, and a microcomputer having an undervoltage detection terminal 10a which is connected to the collector of the transistor Q1 and to which 3.3 V is externally applied and a power supply terminal 10b which is connected to the collector of the transistor Q2 and via which a P-ON-H signal of 3.3 V that starts a power supply circuit 126 when the power supply is turned on is transmitted.
Public/Granted literature
- US20070247775A1 Voltage rise suppression circuit and panel television Public/Granted day:2007-10-25
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