Invention Grant
US07660154B2 Level verification and adjustment for multi-level cell (MLC) non-volatile memory (NVM)
有权
多级单元(MLC)非易失性存储器(NVM)的级别验证和调整
- Patent Title: Level verification and adjustment for multi-level cell (MLC) non-volatile memory (NVM)
- Patent Title (中): 多级单元(MLC)非易失性存储器(NVM)的级别验证和调整
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Application No.: US12343945Application Date: 2008-12-24
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Publication No.: US07660154B2Publication Date: 2010-02-09
- Inventor: Lee Wang
- Applicant: Lee Wang
- Applicant Address: US CA Diamond Bar
- Assignee: FlashSilicon, Incorporation
- Current Assignee: FlashSilicon, Incorporation
- Current Assignee Address: US CA Diamond Bar
- Agency: Haynes and Boone, LLP
- Main IPC: G11C16/00
- IPC: G11C16/00

Abstract:
Non-Volatile Memory (NVM) cells are connected in inverter configurations. The NVM inverter's Voltage Transfer Characteristics (VTC) is used to verify and adjust threshold voltage levels of a Multi-Level Cell (MLC) in an NVM. In one embodiment, the NVM cell is fast programmed to a specific threshold voltage level. The cell threshold level is then verified by applying a gate voltage corresponding to the selected threshold voltage to the NVM inverter. The output voltage of the NVM inverter in response to the applied level gate voltage is detected. When the output voltage of the NVM inverter is out of a predefined output voltage window for the selected threshold voltage level, a fine-tuning programming sequence is applied to the NVM cell until the threshold voltage of the NVM cell is inside the correspondent threshold voltage window. This verification and adjustment scheme for a MLC NVM allows the threshold voltage of the multi-level NVM cells for any specific level to be controlled to a desired accuracy.
Public/Granted literature
- US20090103361A1 LEVEL VERIFICATION AND ADJUSTMENT FOR MULTI-LEVEL CELL (MLC) NON-VOLATILE MEMORY (NVM) Public/Granted day:2009-04-23
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