Invention Grant
US07660161B2 Integrated flash memory systems and methods for load compensation 有权
集成闪存系统和负载补偿方法

Integrated flash memory systems and methods for load compensation
Abstract:
Systems and methods are disclosed including features that compensate for variations in the magnitude of supply voltages used in memory arrays. According to some aspects, compensation circuits may provide a tunable current-limiting load for data columns, where the load can be tuned to dynamically compensate for variations in supply voltage. In certain aspects, a compensation circuit may employ an operational amplifier configured as a voltage follower. The voltage follower compensates for any variations in supply voltage, forcing a constant voltage drop across the load element(s), thus maintaining a constant load. Other circuits may also be included, such as precharge circuits, clamp circuits, buffer circuits, trimming circuit, and sense amplifier circuits with sensed body effect. System-On-Chip integrated system aspects may include a microcontroller, a mixed IP, and a flash memory system having functionality and blocks that interface and interoperate with each other for load compensation.
Public/Granted literature
Information query
Patent Agency Ranking
0/0