Invention Grant
US07660184B2 Semiconductor memory for disconnecting a bit line from a sense amplifier in a standby period and memory system including the semiconductor memory
有权
半导体存储器,用于在待机时段中将位线与读出放大器断开,并且包括半导体存储器的存储器系统
- Patent Title: Semiconductor memory for disconnecting a bit line from a sense amplifier in a standby period and memory system including the semiconductor memory
- Patent Title (中): 半导体存储器,用于在待机时段中将位线与读出放大器断开,并且包括半导体存储器的存储器系统
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Application No.: US11878354Application Date: 2007-07-24
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Publication No.: US07660184B2Publication Date: 2010-02-09
- Inventor: Hiroyuki Kobayashi
- Applicant: Hiroyuki Kobayashi
- Applicant Address: JP Tokyo
- Assignee: Fujitsu Microelectronics Limited
- Current Assignee: Fujitsu Microelectronics Limited
- Current Assignee Address: JP Tokyo
- Agency: Arent Fox LLP
- Priority: JP2006-218658 20060810; JP2007-147347 20070601
- Main IPC: G11C8/00
- IPC: G11C8/00

Abstract:
Each memory block has a plurality of memory cells, and word lines and bit lines connected to the memory cells. Precharge switches connect the bit lines to a precharge line. A switch control circuit controls an operation of the precharge switches and sets a cutoff function that turns off connection switches in a standby period in which no access operation of the memory cells is performed. Since connections of the bit lines and the precharge switch and those of the bit lines and the sense amplifier are cut off in the standby period, if a short circuit failure is present between a word line and a bit line, a leak current can be prevented from flowing from the word line to a precharge voltage line and so on.
Public/Granted literature
- US20080037344A1 Semiconductor memory and memory system Public/Granted day:2008-02-14
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