Invention Grant
US07660916B2 Emulation of independent active DMA channels with a single DMA capable bus master hardware and firmware
有权
使用具有单DMA能力的总线主机硬件和固件来仿真独立的主动DMA通道
- Patent Title: Emulation of independent active DMA channels with a single DMA capable bus master hardware and firmware
- Patent Title (中): 使用具有单DMA能力的总线主机硬件和固件来仿真独立的主动DMA通道
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Application No.: US11155000Application Date: 2005-06-16
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Publication No.: US07660916B2Publication Date: 2010-02-09
- Inventor: Anatoly Moskalev , Parakalan Venkataraghaven
- Applicant: Anatoly Moskalev , Parakalan Venkataraghaven
- Applicant Address: US PA Allentown
- Assignee: Agere Systems Inc.
- Current Assignee: Agere Systems Inc.
- Current Assignee Address: US PA Allentown
- Main IPC: G06F13/00
- IPC: G06F13/00 ; G06F13/36
Abstract:
The present invention utilizes a single DMA engine to process the requests of active DMA channels competing for transfer of data over a single bus. The invention employs two identical sets of DMA request registers which are connected to a processor. These register sets are connected through a switching means to the DMA engine. While a first DMA transfer represented by a first set of registers is active, the process enables preparation of the next request in a second set of registers. Upon completion of the first DMA transfer, the DMA engine is switched to commence processing of the DMA request represented by the second set of registers.
Public/Granted literature
- US20060288128A1 Emulation of independent active DMA channels with a single DMA capable bus master hardware and firmware Public/Granted day:2006-12-21
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