Invention Grant
US07661035B2 Method and system for instruction tracing with enhanced interrupt avoidance
失效
具有增强中断避免的指令跟踪方法和系统
- Patent Title: Method and system for instruction tracing with enhanced interrupt avoidance
- Patent Title (中): 具有增强中断避免的指令跟踪方法和系统
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Application No.: US11933854Application Date: 2007-11-01
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Publication No.: US07661035B2Publication Date: 2010-02-09
- Inventor: Jimmie Earl DeWitt, Jr. , Riaz Y. Hussain , Frank Eliot Levine , Robert John Urquhart
- Applicant: Jimmie Earl DeWitt, Jr. , Riaz Y. Hussain , Frank Eliot Levine , Robert John Urquhart
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Yee & Associates, P.C.
- Agent Matthew W. Baca
- Main IPC: G06F11/00
- IPC: G06F11/00

Abstract:
A method, system, apparatus, and computer program product is presented for tracing operations. A set of related methodologies can be used within instruction tracing software, such as a tracing program, to reduce its tendency to generate interrupts that cause unwanted effects in the system that is being captured. A first methodology allows access to protected memory blocks so that instructions may be read from those memory blocks. A second methodology provides for the trace output buffer to be accessed using physical addressing. A third methodology traces only instruction addresses, which are resolved later during a post-processing phase of operation. A fourth methodology comprises multiple different methods for obtaining copies of instructions that have already executed rather than obtaining them before they are executed.
Public/Granted literature
- US20090083715A1 METHOD AND SYSTEM FOR INSTRUCTION TRACING WITH ENHANCED INTERRUPT AVOIDANCE Public/Granted day:2009-03-26
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