Invention Grant
- Patent Title: Test circuit and method for multilevel cell flash memory
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Application No.: US11953754Application Date: 2007-12-10
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Publication No.: US07661041B2Publication Date: 2010-02-09
- Inventor: Hieu Van Tran , Anh Ly , Sang Thanh Nguyen , Vishal Sarin , Hung Q. Nguyen , William John Saiki , Loc B. Hoang
- Applicant: Hieu Van Tran , Anh Ly , Sang Thanh Nguyen , Vishal Sarin , Hung Q. Nguyen , William John Saiki , Loc B. Hoang
- Applicant Address: US CA Sunnyvale
- Assignee: Silicon Storage Technology, Inc.
- Current Assignee: Silicon Storage Technology, Inc.
- Current Assignee Address: US CA Sunnyvale
- Agency: DLA Piper LLP (US)
- Main IPC: G11C29/00
- IPC: G11C29/00

Abstract:
A test device and method may be used to detect voltage, current or signals of a digital multilevel memory cell system or to test operation or performance by applying inputted voltages, currents or signals to the memory cell system.
Public/Granted literature
- US20090067235A1 Test circuit and method for multilevel cell flash memory Public/Granted day:2009-03-12
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