Invention Grant
US07661046B2 Method and dual interlocked storage cell latch for implementing enhanced testability
失效
方法和双互锁存储单元锁存器,用于实现增强的可测试性
- Patent Title: Method and dual interlocked storage cell latch for implementing enhanced testability
- Patent Title (中): 方法和双互锁存储单元锁存器,用于实现增强的可测试性
-
Application No.: US11682081Application Date: 2007-03-05
-
Publication No.: US07661046B2Publication Date: 2010-02-09
- Inventor: Dennis Martin Rickert , Byron D. Scott
- Applicant: Dennis Martin Rickert , Byron D. Scott
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agent Robert R. Williams
- Main IPC: G01R31/28
- IPC: G01R31/28 ; H03K3/00 ; H03K3/289 ; H03K19/003

Abstract:
A method and a Dual Interlocked Storage Cell (DICE) latch implementing enhanced testability includes an L1 latch and an L2 latch coupled to the L1 latch. Each L1 latch and each L2 latch includes redundant latch structures. A separate output is provided with the redundant L2 latch. The DICE latch includes a Redundant Test Latch Enable (RTLE) input. Each L1 latch and each L2 latch includes a path selector control in the redundant latch structures controlled by the RTLE input providing each of the redundant latch structures in a scan path during a test mode.
Public/Granted literature
- US20080222468A1 Method and Dual Interlocked Storage Cell Latch for Implementing Enhanced Testability Public/Granted day:2008-09-11
Information query