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US07661046B2 Method and dual interlocked storage cell latch for implementing enhanced testability 失效
方法和双互锁存储单元锁存器,用于实现增强的可测试性

Method and dual interlocked storage cell latch for implementing enhanced testability
Abstract:
A method and a Dual Interlocked Storage Cell (DICE) latch implementing enhanced testability includes an L1 latch and an L2 latch coupled to the L1 latch. Each L1 latch and each L2 latch includes redundant latch structures. A separate output is provided with the redundant L2 latch. The DICE latch includes a Redundant Test Latch Enable (RTLE) input. Each L1 latch and each L2 latch includes a path selector control in the redundant latch structures controlled by the RTLE input providing each of the redundant latch structures in a scan path during a test mode.
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