Invention Grant
US07661085B2 Method and system for performing global routing on an integrated circuit design
有权
在集成电路设计中执行全局路由的方法和系统
- Patent Title: Method and system for performing global routing on an integrated circuit design
- Patent Title (中): 在集成电路设计中执行全局路由的方法和系统
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Application No.: US11781692Application Date: 2007-07-23
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Publication No.: US07661085B2Publication Date: 2010-02-09
- Inventor: Minsik Cho , Zhigang Pan
- Applicant: Minsik Cho , Zhigang Pan
- Applicant Address: US TX Austin
- Assignee: Board of Regents, The University of Texas System
- Current Assignee: Board of Regents, The University of Texas System
- Current Assignee Address: US TX Austin
- Agency: Dillon & Yudell LLP
- Agent Antony P. Ng
- Main IPC: G06F17/50
- IPC: G06F17/50
Abstract:
A method for performing global routing on an integrated circuit design is disclosed. The integrated circuit design is initially divided into multiple G-cells. The G-cells are interconnected by a set of nets. The set of nets is then decomposed into corresponding wires. The wires are prerouted to interconnect the G-cells. BoxRouting is performed on the wires until all the wires are routed. Finally, postrouting is performed on the wires.
Public/Granted literature
- US20090031275A1 Method and System for Performing Global Routing on an Integrated Circuit Design Public/Granted day:2009-01-29
Information query
