Invention Grant
- Patent Title: Method for forming gate dielectric layer
- Patent Title (中): 形成栅介质层的方法
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Application No.: US10909339Application Date: 2004-08-03
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Publication No.: US07662683B2Publication Date: 2010-02-16
- Inventor: Jung Wook Lim , Sun Jin Yun , Jin Ho Lee
- Applicant: Jung Wook Lim , Sun Jin Yun , Jin Ho Lee
- Applicant Address: KR Daejon-Shi
- Assignee: Electronics and Telecommunications Research Institute
- Current Assignee: Electronics and Telecommunications Research Institute
- Current Assignee Address: KR Daejon-Shi
- Agency: Lowe Hauptman Ham & Berner, LLP
- Priority: KR10-2003-0096042 20031224
- Main IPC: H01L21/336
- IPC: H01L21/336 ; H01L21/8234 ; H01L21/3205 ; H01L21/31 ; H01L21/469

Abstract:
Provided is a method for forming a gate dielectric layer, in which a plasma oxide layer is finely formed by plasma at a temperature of 200° C. or below, and an atomic layer deposition (ALD) oxide layer is deposited. Further, the gate dielectric layer according to the present invention can be applied to a display device comprising a substrate such as a plastic substrate vulnerable to heat, have good interfacial characteristic, and allow a high dielectric layer to be applied thereto.
Public/Granted literature
- US20050142712A1 Method for forming gate dielectric layer Public/Granted day:2005-06-30
Information query
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