Invention Grant
- Patent Title: Method for fabricating semiconductor devices
- Patent Title (中): 制造半导体器件的方法
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Application No.: US11690521Application Date: 2007-03-23
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Publication No.: US07662696B2Publication Date: 2010-02-16
- Inventor: Atsushi Hiraiwa , Satoshi Sakai , Dai Ishikawa , Yoshihiro Ikeda
- Applicant: Atsushi Hiraiwa , Satoshi Sakai , Dai Ishikawa , Yoshihiro Ikeda
- Applicant Address: JP Tokyo
- Assignee: Renesas Technology Corp.
- Current Assignee: Renesas Technology Corp.
- Current Assignee Address: JP Tokyo
- Agency: Miles & Stockbridge P.C.
- Priority: JPP2002-317028 20021031
- Main IPC: H01L21/31
- IPC: H01L21/31 ; H01L21/469

Abstract:
According to the present invention, an oxide film with the film quality almost equivalent to that of the thermal oxide can be formed by the low-temperature treatment. After removing an insulator on the active region of the substrate which constitutes a semiconductor wafer, an insulator made of, for example, silicon oxide is deposited on the main surface of the semiconductor wafer by the low pressure CVD method. This insulator is a film to form a gate insulator of MISFET in a later step. Subsequently, a plasma treatment is performed in an atmosphere containing oxygen (oxygen plasma treatment) to the insulator in the manner as schematically shown by the arrows. By so doing, the film quality of the insulator formed by the CVD method can be improved to the extent almost equivalent to that of the insulator formed of the thermal oxide.
Public/Granted literature
- US20070190744A1 METHOD FOR FABRICATING SEMICONDUCTOR DEVICES Public/Granted day:2007-08-16
Information query
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