Invention Grant
US07663424B2 Circuit and method for reducing charge injection and clock feed-through in switched capacitor circuits
有权
用于减少开关电容电路中的电荷注入和时钟馈通的电路和方法
- Patent Title: Circuit and method for reducing charge injection and clock feed-through in switched capacitor circuits
- Patent Title (中): 用于减少开关电容电路中的电荷注入和时钟馈通的电路和方法
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Application No.: US11786194Application Date: 2007-04-11
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Publication No.: US07663424B2Publication Date: 2010-02-16
- Inventor: Paul Stulik
- Applicant: Paul Stulik
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent John J. Patti; Wade J. Brady, III; Frederick J. Telecky, Jr.
- Main IPC: G06F7/64
- IPC: G06F7/64

Abstract:
A low charge injection, low clock feed-through switch (1) has an input signal (Vin) applied both to the sources of first (S1) and second (2) switching transistors. A first clock signal (P) having pulses of a first duration ts is applied to a gate of the first switching transistor, and a second clock signal (Pcoarse) having pulses of a second duration m×ts substantially less than the first duration is applied to a gate of the second switching transistor. A capacitor (C) is charged toward the input voltage through both the first and second switching transistors during the pulse of the second clock signal. The capacitor is charged further toward the input voltage during a remaining portion of the pulse of the first clock signal.
Public/Granted literature
- US20080252358A1 Circuit and method for reducing charge injection and clock feed-through in switched capacitor circuits Public/Granted day:2008-10-16
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