Invention Grant
- Patent Title: Semiconductor device and method of manufacturing the semiconductor device
- Patent Title (中): 半导体装置及其制造方法
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Application No.: US12331707Application Date: 2008-12-10
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Publication No.: US07663861B2Publication Date: 2010-02-16
- Inventor: Shinji Nishiura
- Applicant: Shinji Nishiura
- Applicant Address: JP Osaka
- Assignee: Panasonic Corporation
- Current Assignee: Panasonic Corporation
- Current Assignee Address: JP Osaka
- Agency: McDermott Will & Emery LLP
- Priority: JP2007-317917 20071210
- Main IPC: H01G4/228
- IPC: H01G4/228

Abstract:
An MIM capacitance element (capacitance lower electrode, capacitance insulation film and capacitance upper electrode) is provided on a first insulation film on a semiconductor substrate. An interlayer insulation film is provided so as to cover the MIM capacitance element and flattened. The interlayer insulation film is provided with a first connection plug connected to the capacitance upper electrode, a first wiring layer, and a second wiring layer. A second insulation film is provided on the interlayer insulation film. The second insulation film is provided with first and second openings. A wiring pull-out portion which connects the first connection plug and the second wiring layer to each other is provided on the second insulation film.
Public/Granted literature
- US20090147438A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE Public/Granted day:2009-06-11
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