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US07663916B2 Logic compatible arrays and operations 有权
逻辑兼容阵列和操作

Logic compatible arrays and operations
Abstract:
An array of memory cells arranged in a plurality of rows and a plurality of columns are provided. The array includes a first program line in a first direction, wherein the first program line is connected to program gates of memory cells in a first row of the array; a first erase line in the first direction, wherein the first erase line is connected to erase gates of the memory cells in the first row of the array; and a first word-line in the first direction, wherein the first word-line is connected to word-line nodes of the memory cells in the first row of the array.
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