Invention Grant
US07663927B2 Reading voltage generator for a non-volatile EEPROM memory cell matrix of a semiconductor device and corresponding manufacturing process 有权
读取电压发生器用于半导体器件的非易失性EEPROM存储单元阵列和相应的制造工艺

Reading voltage generator for a non-volatile EEPROM memory cell matrix of a semiconductor device and corresponding manufacturing process
Abstract:
A reference voltage generator for a matrix of non-volatile memory cells of the EEPROM type, comprises at least one array enabled by an access transistor. The array comprises at least one reference cell associated with a relative select transistor, the transistors and the cell being realized on a semiconductor substrate and having active regions delimited by suitable field oxide regions and covered by a tunnel oxide layer and comprising at least one floating gate realized by a first polysilicon layer and covered by a dielectric layer and by a second polysilicon layer. Advantageously, the floating gate of the reference cells is contacted by a first contact terminal connected to a discharge transistor for the periodical discharge of possibly present charges. A process manufactures such a voltage generator.
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