A semiconductor circuit of the invention comprises: a memory cell array including a plurality of memory cells formed at intersections between a plurality of word lines and a plurality of bit lines; a plurality of sense amplifiers each for amplifying data of the memory cell connected to a selected word line through the bit line; a plurality of data holding circuits each for holding data transferred from the plurality of sense amplifiers; and a plurality of selectors each for selecting a data holding circuit from a unit group including a predetermined number of the data holding circuits based on logic input data, and for externally connecting one end of the selected data holding circuit.