Invention Grant
US07664908B2 Semiconductor memory device and operating method of the same 失效
半导体存储器件及其操作方法相同

Semiconductor memory device and operating method of the same
Abstract:
A semiconductor memory device adapted to burst transmission is provided for improving flexibility of data write operation. The semiconductor memory device is composed of a memory array, a set of write registers, and an input buffer designed to sequentially receive a series of write data during a burst cycle, and to write the write data into the associated write registers. The device also includes a write release register containing a set of write release flags associated with the write registers, respectively, and a write release register controller asserting the associated write release flags in response to the write data being written into the associated write registers. The device also contains a write amplifier designed to concurrently write the write data contained in the write registers associated with the asserted write release flags, selectively, when the burst cycle is aborted in response to a control signal.
Public/Granted literature
Information query
Patent Agency Ranking
0/0