Invention Grant
US07664915B2 High performance raid-6 system architecture with pattern matching
有权
具有模式匹配的高性能raid-6系统架构
- Patent Title: High performance raid-6 system architecture with pattern matching
- Patent Title (中): 具有模式匹配的高性能raid-6系统架构
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Application No.: US11642315Application Date: 2006-12-19
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Publication No.: US07664915B2Publication Date: 2010-02-16
- Inventor: Vinodh Gopal , Gilbert Wolrich , Kirk S. Yap , Wajdi K. Feghali , John Vranich , Robert P. Ottavi
- Applicant: Vinodh Gopal , Gilbert Wolrich , Kirk S. Yap , Wajdi K. Feghali , John Vranich , Robert P. Ottavi
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Main IPC: G06F12/00
- IPC: G06F12/00

Abstract:
An acceleration unit offloads computationally intensive tasks from a processor. The acceleration unit includes two data processing paths each having an Arithmetic Logical Unit and sharing a single multiplier unit. Each data processing path may perform configurable operations in parallel on a same data. Special multiplexer paths and instructions are provided to allow P and Q type syndromes to be computed on a stripe in a single-pass of the data through the acceleration unit.
Public/Granted literature
- US20080148025A1 High performance raid-6 system architecture with pattern matching Public/Granted day:2008-06-19
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