Invention Grant
- Patent Title: Methods of forming wiring to transistor and related transistor
- Patent Title (中): 形成晶体管及相关晶体管的方法
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Application No.: US11677598Application Date: 2007-02-22
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Publication No.: US07666723B2Publication Date: 2010-02-23
- Inventor: David J. Frank , Douglas C. La Tulipe, Jr. , Steven E. Steen , Anna W. Topol
- Applicant: David J. Frank , Douglas C. La Tulipe, Jr. , Steven E. Steen , Anna W. Topol
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Hoffman Warnick LLC
- Agent Vazken Alexanian
- Main IPC: H01L21/84
- IPC: H01L21/84

Abstract:
Methods of wiring to a transistor and a related transistor are disclosed. In one embodiment, the method includes a method of forming wiring to a transistor, the method comprising: forming a transistor on a semiconductor-on-insulator (SOI) substrate using masks that are mirror images of an intended layout, the forming including forming a gate and a source/drain region for each and a channel, the SOI substrate including a semiconductor-on-insulator (SOI) layer, a buried insulator layer and a silicon substrate; forming a dielectric layer over the transistor; bonding the dielectric layer to another substrate; removing the silicon substrate from the SOI substrate to the buried insulator layer; forming a contact to each of the source/drain region and the gate from a channel side of the gate; and forming at least one wiring to the contacts on the channel side of the gate.
Public/Granted literature
- US20080206977A1 METHODS OF FORMING WIRING TO TRANSISTOR AND RELATED TRANSISTOR Public/Granted day:2008-08-28
Information query
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