Invention Grant
- Patent Title: Process for fabricating a substrate of the silicon-on-insulator type with thin surface layer
- Patent Title (中): 用于制造具有薄表面层的绝缘体上硅型衬底的工艺
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Application No.: US11848964Application Date: 2007-08-31
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Publication No.: US07666758B2Publication Date: 2010-02-23
- Inventor: Eric Neyret
- Applicant: Eric Neyret
- Applicant Address: FR Bernin
- Assignee: S.O.I.Tec Silicon on Insulator Technologies
- Current Assignee: S.O.I.Tec Silicon on Insulator Technologies
- Current Assignee Address: FR Bernin
- Agency: Winston & Strawn LLP
- Priority: FR0700718 20070201
- Main IPC: H01L21/20
- IPC: H01L21/20

Abstract:
A process for fabricating a silicon on insulator (SOI) substrate by forming a weakened zone within a semiconductor donor substrate to define a thick layer having a thickness of greater 150 nm and form a boundary between the thick layer and a remainder of the donor substrate, bonding the donor substrate to a semiconductor receiver substrate, with one of the substrates including an oxide layer that is present between the donor and receiver substrates after bonding; detaching a remainder of the donor substrate along the weakened zone to obtain a semifinished SOI substrate comprising the receiver substrate, the oxide layer and the thick layer; and finishing the semifinished SOI substrate by thinning the thick layer to obtain a silicon layer having a thickness is less than that of the thick layer but greater than 150 nm; long annealing the semifinished SOI substrate in a gaseous atmosphere comprising hydrogen and/or argon; and thinning the thin layer to obtain an ultrathin layer with a thickness of 150 nm or less and the finished substrate.
Public/Granted literature
- US20080188060A1 PROCESS FOR FABRICATING A SUBSTRATE OF THE SILICON-ON-INSULATOR TYPE WITH THIN SURFACE LAYER Public/Granted day:2008-08-07
Information query
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