Invention Grant
US07666788B2 Methods for forming conductive vias in semiconductor device components
有权
在半导体器件部件中形成导电通孔的方法
- Patent Title: Methods for forming conductive vias in semiconductor device components
- Patent Title (中): 在半导体器件部件中形成导电通孔的方法
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Application No.: US11717437Application Date: 2007-03-12
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Publication No.: US07666788B2Publication Date: 2010-02-23
- Inventor: Nishant Sinha
- Applicant: Nishant Sinha
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: TraskBritt
- Main IPC: H01L21/44
- IPC: H01L21/44

Abstract:
A method for forming conductive vias in a substrate of a semiconductor device component includes forming one or more holes, or apertures or cavities, in the substrate so as to extend only partially through the substrate. A barrier layer, such as an insulative layer, may be formed on surfaces of each hole. Surfaces within each hole may be coated with a seed layer, which facilitates adhesion of conductive material within each hole. Conductive material is introduced into each hole. Introduction of the conductive material may be effected by deposition or plating. Alternatively, conductive material in the form of solder may be introduced into each hole.
Public/Granted literature
- US20070166991A1 Methods for forming conductive vias in semiconductor device components Public/Granted day:2007-07-19
Information query
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