Invention Grant
US07667216B2 Method of achieving CD linearity control for full-chip CPL manufacturing
有权
实现全芯片CPL制造的CD线性控制的方法
- Patent Title: Method of achieving CD linearity control for full-chip CPL manufacturing
- Patent Title (中): 实现全芯片CPL制造的CD线性控制的方法
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Application No.: US11708029Application Date: 2007-02-20
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Publication No.: US07667216B2Publication Date: 2010-02-23
- Inventor: Doug Van Den Broeke , Chungwei Hsu , Jang Fung Chen
- Applicant: Doug Van Den Broeke , Chungwei Hsu , Jang Fung Chen
- Applicant Address: NL
- Assignee: ASML Masktools B.V.
- Current Assignee: ASML Masktools B.V.
- Current Assignee Address: NL
- Agency: Pillsbury Winthrop Shaw Pittman LLP
- Main IPC: G01N21/86
- IPC: G01N21/86 ; G03F1/00 ; G06F17/50
Abstract:
A method of generating masks for printing a pattern including a plurality of features having varying critical dimensions. The method includes the steps of: (1) obtaining data representing the pattern; (2) defining a plurality of distinct zones based on the critical dimensions of the plurality of features; (3) categorizing each of the features into one of the plurality of distinct zones; and (4) modifying the mask pattern for each feature categorized into a predefined distinct zone of the plurality of distinct zones.
Public/Granted literature
- US20070148562A1 Method of achieving CD linearity control for full-chip CPL manufacturing Public/Granted day:2007-06-28
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